The Cypress S34ML08G1, 8 GB NAND is offered in 3.3 V_CC with a x8 I/O interface. Its NAND cell provides a cost-effective solution for the solid-state, mass-storage market. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. The page size is (2048 + 64 spare) bytes.

Each block can be programmed and erased up to 100,000 cycles with error correction code (ECC) on. To extend the lifetime of NAND Flash devices, the implementation of an ECC is mandatory.

The chip supports CE# Don't Care function. This function allows the direct download of the code from the NAND Flash memory device by a microcontroller, since the CE# transitions do not stop the read operation.

The devices have a Read Cache feature that improves the read throughput for large files. During cache reading, the devices load the data in a cache register while the previous data is transferred to the I/O buffers to be read.

In multiplane operations, data in the page can be read out at 25 ns cycle time per byte. The I/O pins serve as the ports for command and address input as well as data input/output. This interface allows a reduced pin count and easy migration towards different densities, without any rearrangement of the footprint.  

Thanks to multiplane architecture, it is possible to program two pages at a time (one per plane) or to erase two blocks at a time (again, one per plane). The multiplane architecture allows program time to be reduced by 40% and erase time to be reduced by 50%.

Multiplane Copy Back is also supported. Data read out after Copy Back Read (both for single and multiplane cases) is allowed.
In addition, Cache Program and Multiplane Cache Program operations improve the programming throughput by programming data using the cache register.

The devices provide two innovative features: Page Reprogram and Multiplane Page Reprogram. The Page Reprogram re-programs one page. Normally, this operation is performed after a failed Page Program operation. Similarly, the Multiplane Page Reprogram reprograms two pages in parallel, one per plane. The first page must be in the first plane while the second page must be in the second plane. The Multiplane Page Reprogram operation is performed after a failed Multiplane Page Program operation. The Page Reprogram and Multiplane Page Reprogram guarantee improved performance; since data insertion can be omitted during reprogram operations.