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74ALVCH16600DLG4

74ALVCH16600DLG4
Mfr. #:
74ALVCH16600DLG4
विवरण:
Bus Transceivers 18-Bit Univ Bus Trncvr W/3-St Otpt
जीवन चक्र:
यस निर्माताबाट नयाँ।
डाटा पाना:
74ALVCH16600DLG4 डाटा पाना
डेलिभरी:
DHL FedEx Ups TNT EMS
भुक्तानी:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
थप जानकारी:
74ALVCH16600DLG4 थप जानकारी 74ALVCH16600DLG4 Product Details
उत्पादन विशेषता
विशेषता मान
निर्माता:
टेक्सास उपकरण
उत्पादन कोटि:
बस ट्रान्ससिभर
RoHS:
Y
तर्क परिवार:
74AL
इनपुट स्तर:
LVTTL
आउटपुट स्तर:
LVTTL
आउटपुट प्रकार:
3-State
उच्च स्तर आउटपुट वर्तमान:
- 24 mA
निम्न स्तर आउटपुट वर्तमान:
24 mA
प्रचार ढिलाइ समय:
6.8 ns
आपूर्ति भोल्टेज - अधिकतम:
3.6 V
आपूर्ति भोल्टेज - न्यूनतम:
1.65 V
न्यूनतम परिचालन तापमान:
- 40 C
अधिकतम परिचालन तापमान:
+ 85 C
प्याकेज / केस:
SSOP-56
प्याकेजिङ:
ट्यूब
समारोह:
युनिभर्सल बस ट्रान्सीभर
उचाइ:
2.59 mm
लम्बाइ:
18.41 mm
सर्किट संख्या:
1
उत्पादन:
CMOS
प्रविधि:
CMOS
चौडाइ:
7.49 mm
ब्रान्ड:
टेक्सास उपकरण
माउन्टिङ शैली:
SMD/SMT
च्यानलहरूको संख्या:
18
हालको आपूर्ति - अधिकतम:
40 uA
सञ्चालन आपूर्ति भोल्टेज:
1.65 V to 3.6 V
ध्रुवता:
गैर-उल्टाउने
उत्पादन प्रकार:
बस ट्रान्ससिभर
कारखाना प्याक मात्रा:
1
उपश्रेणी:
तर्क ICs
ट्रिगर गर्ने प्रकार:
नकारात्मक किनारा
एकाइ वजन:
0.024508 oz
Tags
74ALVCH16600D, 74ALVCH16600, 74ALVCH1660, 74ALVCH166, 74ALVCH1, 74ALVCH, 74ALVC, 74ALV, 74AL, 74A
Service Guarantees

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We provide 90-360 days warranty.

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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
*** Stop Electro
Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56
***i-Key
IC UNIV BUS TXRX 18BIT 56SSOP
***eco
18-BIT UBT W/CLK ENABLE
***el Nordic
Contact for details
***as Instruments
This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16600 combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB\ and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB\ and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB\ and CLKENBA\) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB\ is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB\. Output enable OEAB\ is active low. When OEAB\ is low, the outputs are active. When OEAB\ is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA\, LEBA, CLKBA\, and CLKENBA\. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
भाग # विवरण स्टक मूल्य
74ALVCH16600DLG4
DISTI # 74ALVCH16600DLG4-ND		IC UNIV BUS TXRX 18BIT 56SSOP
RoHS: Compliant
Min Qty: 120
Container: Tube		Limited Supply - Call
    74ALVCH16600DLG4
    DISTI # 595-74ALVCH16600DLG4    		Bus Transceivers 18-Bit Univ Bus Trncvr W/3-St Otpt
    RoHS: Compliant    		0
      छवि भाग # विवरण
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      OMO.#: OMO-74ALVCH16601DGG118-1190

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      Mfr.#: 74ALVCH16244TX

      OMO.#: OMO-74ALVCH16244TX-ON-SEMICONDUCTOR

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      		 नयाँ र मौलिक
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      Mfr.#: 74ALVCH16841DGGS

      OMO.#: OMO-74ALVCH16841DGGS-NEXPERIA

      		 Latches 20-Bit Bus Interface D-Type, Latch
      उपलब्धता
      स्टक:
      Available
      अर्डर मा:
      5500
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