SN74ALS29854DWRG4

SN74ALS29854DWRG4
Mfr. #:
SN74ALS29854DWRG4
विवरण:
Bus Transceivers 8B To 9B Parity Bus TRNSCVR
जीवन चक्र:
यस निर्माताबाट नयाँ।
डाटा पाना:
SN74ALS29854DWRG4 डाटा पाना
डेलिभरी:
DHL FedEx Ups TNT EMS
भुक्तानी:
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ECAD Model:
थप जानकारी:
SN74ALS29854DWRG4 थप जानकारी SN74ALS29854DWRG4 Product Details
उत्पादन विशेषता
विशेषता मान
निर्माता:
टेक्सास उपकरण
उत्पादन कोटि:
बस ट्रान्ससिभर
RoHS:
Y
तर्क परिवार:
ALS
इनपुट स्तर:
TTL
आउटपुट स्तर:
TTL
आउटपुट प्रकार:
3-State
उच्च स्तर आउटपुट वर्तमान:
- 24 mA
निम्न स्तर आउटपुट वर्तमान:
48 mA
प्रचार ढिलाइ समय:
13 ns
आपूर्ति भोल्टेज - अधिकतम:
5.25 V
आपूर्ति भोल्टेज - न्यूनतम:
4.75 V
न्यूनतम परिचालन तापमान:
0 C
अधिकतम परिचालन तापमान:
+ 70 C
प्याकेज / केस:
SOIC-24
प्याकेजिङ:
रील
समारोह:
प्यारिटी परीक्षक संग बस ट्रान्सीभर
उचाइ:
2.35 mm
लम्बाइ:
15.4 mm
सर्किट संख्या:
1
उत्पादन:
द्विध्रुवी
प्रविधि:
द्विध्रुवी
चौडाइ:
7.52 mm
ब्रान्ड:
टेक्सास उपकरण
माउन्टिङ शैली:
SMD/SMT
च्यानलहरूको संख्या:
8
सञ्चालन आपूर्ति भोल्टेज:
5 V
ध्रुवता:
गैर-उल्टाउने
उत्पादन प्रकार:
बस ट्रान्ससिभर
कारखाना प्याक मात्रा:
1
उपश्रेणी:
तर्क ICs
एकाइ वजन:
0.022025 oz
Tags
SN74ALS29854DWR, SN74ALS29854D, SN74ALS2985, SN74ALS298, SN74ALS29, SN74ALS2, SN74ALS, SN74AL, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC TRANSCVR 8-9BIT INVERT 24SOIC
***ark
Transceiver Logic IC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Leaded Process Compatible:Yes; Logic Family:ALS; Package/Case:24-SOIC; Peak Reflow Compatible (260 C):Yes ;RoHS Compliant: Yes
***as Instruments
The SN74ALS29854 is an 8-bit to 9-bit parity transceiver designed for two-way communication between data buses. When data is transmitted from the A bus to the B bus, a parity bit is generated. When data is transmitted from the B bus to the A bus with its corresponding parity bit, the parity-error () output indicates whether or not an error in the B data has occurred. The output-enable (, ) inputs can be used to disable the device so that the buses are effectively isolated. A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with an open-collector flag. can be either passed, sampled, stored, or cleared from the latch using the latch-enable () and clear () control inputs. When both OEA\ and OEB\ are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. The SN74ALS29854 is characterized for operation from 0°C to 70°C.
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उपलब्धता
स्टक:
Available
अर्डर मा:
5000
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