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74ABT16833DGGRG4

74ABT16833DGGRG4
Mfr. #:
74ABT16833DGGRG4
विवरण:
Bus Transceivers Dual 8-9B Parity Bus Xceivers
जीवन चक्र:
यस निर्माताबाट नयाँ।
डाटा पाना:
74ABT16833DGGRG4 डाटा पाना
डेलिभरी:
DHL FedEx Ups TNT EMS
भुक्तानी:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
थप जानकारी:
74ABT16833DGGRG4 थप जानकारी 74ABT16833DGGRG4 Product Details
उत्पादन विशेषता
विशेषता मान
निर्माता:
टेक्सास उपकरण
उत्पादन कोटि:
बस ट्रान्ससिभर
RoHS:
Y
तर्क परिवार:
ABT
इनपुट स्तर:
TTL
आउटपुट स्तर:
TTL
आउटपुट प्रकार:
3-State
उच्च स्तर आउटपुट वर्तमान:
- 32 mA
निम्न स्तर आउटपुट वर्तमान:
64 mA
आपूर्ति भोल्टेज - अधिकतम:
5.5 V
आपूर्ति भोल्टेज - न्यूनतम:
4.5 V
न्यूनतम परिचालन तापमान:
- 40 C
अधिकतम परिचालन तापमान:
+ 85 C
प्याकेज / केस:
TSSOP-56
प्याकेजिङ:
रील
समारोह:
समानता परीक्षक संग दर्ता ट्रान्सीभर
उचाइ:
1.15 mm
लम्बाइ:
14 mm
सर्किट संख्या:
2
उत्पादन:
BiCMOS
शान्त वर्तमान:
28 mA
प्रविधि:
BiCMOS
चौडाइ:
6.1 mm
ब्रान्ड:
टेक्सास उपकरण
माउन्टिङ शैली:
SMD/SMT
च्यानलहरूको संख्या:
16
हालको आपूर्ति - अधिकतम:
36 mA
सञ्चालन आपूर्ति भोल्टेज:
4.5 V to 5.5 V
ध्रुवता:
गैर-उल्टाउने
उत्पादन प्रकार:
बस ट्रान्ससिभर
कारखाना प्याक मात्रा:
1
उपश्रेणी:
तर्क ICs
ट्रिगर गर्ने प्रकार:
सकारात्मक किनारा
एकाइ वजन:
0.008917 oz
Tags
74ABT1683, 74ABT168, 74ABT16, 74ABT1, 74ABT, 74AB, 74A
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC DUAL 8-9BIT BUS TXRX 56-TSSOP
***as Instruments
The 'ABT16833 consist of two noninverting 8-bit to 9-bit parity bus transceivers and are designed for communication between data buses. For each transceiver, when data is transmitted from the A bus to the B bus, an odd-parity bit is generated and output on the parity I/O pin (1PARITY or 2PARITY). When data is transmitted from the B bus to the A bus, 1PARITY (or 2PARITY) is configured as an input and combined with the B-input data to generate an active-low error flag if odd parity is not detected. The error (1 or 2) output is configured as an open-collector output. The B-to-A parity-error flag is clocked into 1 (or 2) on the low-to-high transition of the clock (1CLK or 2CLK) input. 1 (or 2) is cleared (set high) by taking the clear (1 or 2) input low. The output-enable ( and) inputs can be used to disable the device so that the buses are effectively isolated. When both and are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT16833 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16833 is characterized for operation from -40°C to 85°C.
भाग # विवरण स्टक मूल्य
74ABT16833DGGRG4
DISTI # 74ABT16833DGGRG4-ND		IC TXRX NON-INVERT 5.5V 56TSSOP
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)		Limited Supply - Call
    74ABT16833DGGRG4
    DISTI # 595-74ABT16833DGGRG4    		Bus Transceivers Dual 8-9B Parity Bus Xceivers
    RoHS: Compliant    		0
      छवि भाग # विवरण
      74ABT16833DGGRG4

      Mfr.#: 74ABT16833DGGRG4

      OMO.#: OMO-74ABT16833DGGRG4

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      OMO.#: OMO-74ABT16823ADL-518-NXP-SEMICONDUCTORS

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      Mfr.#: 74ABT16827ADL,512

      OMO.#: OMO-74ABT16827ADL-512-NXP-SEMICONDUCTORS

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      74ABT16833DGGRG4

      Mfr.#: 74ABT16833DGGRG4

      OMO.#: OMO-74ABT16833DGGRG4-TEXAS-INSTRUMENTS

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      Mfr.#: 74ABT16841ADL,518

      OMO.#: OMO-74ABT16841ADL-518-NXP-SEMICONDUCTORS

      		 IC 20BIT BUS INTFC LATCH 56SSOP
      74ABT16833DLR

      Mfr.#: 74ABT16833DLR

      OMO.#: OMO-74ABT16833DLR-1190

      		 नयाँ र मौलिक
      74ABT16823ADL

      Mfr.#: 74ABT16823ADL

      OMO.#: OMO-74ABT16823ADL-1190

      		 Flip Flops 18-BIT D-TYPE 3-S
      उपलब्धता
      स्टक:
      Available
      अर्डर मा:
      4500
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