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CD74HC195NSR

CD74HC195NSR
Mfr. #:
CD74HC195NSR
विवरण:
Counter Shift Registers High Speed CMOS 4-Bit Prl Access Reg
जीवन चक्र:
यस निर्माताबाट नयाँ।
डाटा पाना:
CD74HC195NSR डाटा पाना
डेलिभरी:
DHL FedEx Ups TNT EMS
भुक्तानी:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
थप जानकारी:
CD74HC195NSR थप जानकारी CD74HC195NSR Product Details
उत्पादन विशेषता
विशेषता मान
निर्माता:
टेक्सास उपकरण
उत्पादन कोटि:
काउन्टर शिफ्ट दर्ताहरू
RoHS:
Y
गणना अनुक्रम:
श्रृङ्खला/सिरियल/समानान्तर
सर्किट संख्या:
1
बिट्स संख्या:
4 bit
प्याकेज / केस:
SO-16
तर्क परिवार:
HC
तर्क प्रकार:
CMOS
इनपुट लाइनहरूको संख्या:
6
प्रचार ढिलाइ समय:
175 ns, 35 ns, 30 ns
आपूर्ति भोल्टेज - अधिकतम:
6 V
न्यूनतम परिचालन तापमान:
- 55 C
अधिकतम परिचालन तापमान:
+ 125 C
प्याकेजिङ:
रील
समारोह:
शिफ्ट दर्ता
सञ्चालन तापमान दायरा:
- 55 C to + 125 C
शृङ्खला:
CD74HC195
चौडाइ:
5.3 mm
ब्रान्ड:
टेक्सास उपकरण
माउन्टिङ शैली:
SMD/SMT
आउटपुट लाइनहरूको संख्या:
4
सञ्चालन आपूर्ति भोल्टेज:
2.5 V, 3.3 V, 5 V
उत्पादन प्रकार:
काउन्टर शिफ्ट दर्ताहरू
कारखाना प्याक मात्रा:
2000
उपश्रेणी:
तर्क ICs
एकाइ वजन:
0.007079 oz
Tags
CD74HC195, CD74HC19, CD74HC1, CD74HC, CD74H, CD74, CD7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
    R***s
    R***s
    RU

    Work perfectly!) came quickly

    2019-03-27
    A***o
    A***o
    RU

    To voronezh 25 days.

    2019-01-29
***AS INSTUMENTS
The device is useful in a wide variety of shifting, counting and storage applications. It performs serial, parallel, serial to parallel, or parallel to serial data transfers at very high speeds.
***AS INTRUMENTS
The two modes of operation, shift right (Q0-Q1) and parallel load, are controlled by the state of the Parallel Enable (PE)\ input. Serial data enters the first flip-flop (Q0) via the J and K\ inputs when the PE\ input is high, and is shifted one bit in the direction Q0-Q1-Q2-Q3 following each Low to High clock transition. The J and K\ inputs provide the flexibility of the JK-type input for special applications and by tying the two pins together, the simple D-type input for general applications. The device appears as four common-clocked D flip-flops when the PE\ input is Low. After the Low to High clock transition, data on the parallel inputs (D0-D3) is transferred to the respective Q0-Q3 outputs. Shift left operation (Q3-Q2) can be achieved by tying the Qn outputs to the Dn-1 inputs and holding the PE\ input low.
***AS INSRUMENTS
All parallel and serial data transfers are synchronous, occurring after each Low to High clock transition. The ’HC195 series utilizes edge triggering; therefore, there is no restriction on the activity of the J, K\, Pn and PE\ inputs for logic operations, other than set-up and hold time requirements. A Low on the asynchronous Master Reset (MR)\ input sets all Q outputs Low, independent of any other input condition.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
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उपलब्धता
स्टक:
Available
अर्डर मा:
1984
मात्रा प्रविष्ट गर्नुहोस्:
CD74HC195NSR को हालको मूल्य सन्दर्भको लागि मात्र हो, यदि तपाइँ उत्तम मूल्य प्राप्त गर्न चाहनुहुन्छ भने, कृपया हाम्रो बिक्री टोली sales@omo-ic.com मा सोधपुछ वा प्रत्यक्ष इमेल पेश गर्नुहोस्।
सन्दर्भ मूल्य (USD)
मात्रा
एकाइ मूल्य
विस्तार मूल्य
1
US$ ०.८६
US$ ०.८६
10
US$ ०.७३
US$ ७.३४
100
US$ ०.५६
US$ ५६.४०
500
US$ ०.५०
US$ २४९.००
1000
US$ ०.३९
US$ ३९३.००
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