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SN74AS867DWRG4

SN74AS867DWRG4
Mfr. #:
SN74AS867DWRG4
विवरण:
Counter ICs Synch 8B Up DWN Counters
जीवन चक्र:
यस निर्माताबाट नयाँ।
डाटा पाना:
SN74AS867DWRG4 डाटा पाना
डेलिभरी:
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ECAD Model:
थप जानकारी:
SN74AS867DWRG4 थप जानकारी SN74AS867DWRG4 Product Details
उत्पादन विशेषता
विशेषता मान
निर्माता:
टेक्सास उपकरण
उत्पादन कोटि:
काउन्टर ICs
RoHS:
Y
माउन्टिङ शैली:
SMD/SMT
प्याकेज / केस:
SOIC-24
काउन्टर प्रकार:
बाइनरी
तर्क परिवार:
TTL
बिट्स संख्या:
8
गणना विधि:
एसिन्क्रोनस
गणना अनुक्रम:
माथि तल
सञ्चालन आपूर्ति भोल्टेज:
4.5 V to 5.5 V
प्याकेजिङ:
रील
ब्रान्ड:
टेक्सास उपकरण
उत्पादन प्रकार:
काउन्टर ICs
कारखाना प्याक मात्रा:
1
उपश्रेणी:
काउन्टर ICs
एकाइ वजन:
0.038731 oz
Tags
SN74AS867DWR, SN74AS867D, SN74AS867, SN74AS86, SN74AS8, SN74AS, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC COUNTER BINARY 8BIT 24SOIC
***ser
Logic - Counters Synch 8B Up DWN Counters
***ark
Counter Logic IC; Logic Family:AS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:24-SOIC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes
***as Instruments
These synchronous, presettable, 8-bit up/down counters feature internal-carry look-ahead circuitry for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when so instructed by the count-enable (,) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the eight flip-flops on the rising (positive-going) edge of the clock waveform. These counters are fully programmable; they may be preset to any number between 0 and 255. The load-input circuitry allows parallel loading of the cascaded counters. Because loading is synchronous, selecting the load mode disables the counter and causes the outputs to agree with the data inputs after the next clock pulse. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Two count-enable (and ) inputs and a ripple-carry () output are instrumental in accomplishing this function. Both and must be low to count. The direction of the count is determined by the levels of the select (S0, S1) inputs as shown in the function table. is fed forward to enable . thus enabled produces a low-level pulse while the count is zero (all outputs low) counting down or 255 counting up (all outputs high). This low-level overflow-carry pulse can be used to enable successive cascaded stages. Transitions at and are allowed regardless of the level of CLK. All inputs are diode clamped to minimize transmission-line effects, thereby simplifying system design. These counters feature a fully independent clock circuit. With the exception of the asynchronous clear on the SN74ALS867A and ´AS867, changes at S0 and S1 that modify the operating mode have no effect on the Q outputs until clocking occurs. For the ´AS867 and ´AS869, any time ENP\ and/or ENT\ is taken high, either goes or remains high. For the SN74ALS867A and SN74ALS869, any time is taken high, either goes or remains high. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times. The SN54AS867 and SN54AS869 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS867A, SN74ALS869, SN74AS867, and SN74AS869 are characterized for operation from 0°C to 70°C.
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उपलब्धता
स्टक:
Available
अर्डर मा:
5500
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