SN74ACT7805-20DLR

SN74ACT7805-20DLR
Mfr. #:
SN74ACT7805-20DLR
विवरण:
IC CLOCKED FIFO 256X18 56-SSOP
जीवन चक्र:
यस निर्माताबाट नयाँ।
डाटा पाना:
SN74ACT7805-20DLR डाटा पाना
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SN74ACT7805-20DLR थप जानकारी SN74ACT7805-20DLR Product Details
उत्पादन विशेषता
विशेषता मान
निर्माता
टेक्सास उपकरण
उत्पादन कोटि
तर्क - FIFOs मेमोरी
शृङ्खला
74ACT
प्याकेजिङ
टेप र रिल (TR)
प्याकेज-केस
56-BSSOP (0.295", 7.50mm Width)
सञ्चालन - तापक्रम
0°C ~ 70°C
माउन्टिङ-प्रकार
सतह माउन्ट
समारोह
सिंक्रोनस
भोल्टेज - आपूर्ति
4.5 V ~ 5.5 V
आपूर्तिकर्ता-उपकरण-प्याकेज
56-SSOP
मेमोरी साइज
4.5K (256 x 18)
डाटा दर
50MHz
पहुँच-समय
13ns
वर्तमान-आपूर्ति-अधिकतम
400μA
बस - दिशात्मक
एकदिशात्मक
विस्तार-प्रकार
चौडाइ
प्रोग्रामयोग्य-झण्डा-समर्थन
हो
पुन: प्रसारण क्षमता
छैन
FWFT- समर्थन
छैन
Tags
SN74ACT7805-2, SN74ACT7805, SN74ACT780, SN74ACT78, SN74ACT7, SN74ACT, SN74AC, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***et
FIFO Mem Sync Dual Width Uni-Dir 256 x 18 56-Pin SSOP T/R
***i-Key
IC CLOCKED FIFO 256X18 56-SSOP
***as Instruments
The SN74ACT7805 is a 256-word 18-bit clocked FIFO suited for buffering asynchronous data paths up to 67-MHz clock rates and 12-ns access times. Two devices can be configured for bidirectional data buffering without additional logic. Multiple distributed VCC and GND pins, along with Texas Instruments patented output edge control (OECTM) circuit, dampen simultaneous switching noise. The write clock (WRTCLK) and read clock (RDCLK) are free running and can be asynchronous or coincident. Data is written to memory on the rising edge of WRTCLK when WRTEN1 is high, WRTEN2\ is low, and IR is high. Data is read from memory on the rising edge of RDCLK when RDEN\, OE1\, and OE2\ are low and OR is high. The first word written to memory is clocked through to the output buffer, regardless of the RDEN\, OE1\, and OE2\ levels. The OR flag indicates that valid data is present on the output buffer. The FIFO can be reset asynchronously to WRTCLK and RDCLK. RESET\ must be asserted while at least four WRTCLK and four RDCLK rising edges occur to clear the synchronizing registers. Resetting the FIFO initializes the input-ready (IR), output-ready (OR), and half-full (HF) flags low and the almost-full/almost-empty (AF/AE) flag high. The FIFO must be reset upon power up. The SN74ACT7805 is characterized for operation from 0C to 70C.
भाग # विवरण स्टक मूल्य
SN74ACT7805-20DLR
DISTI # SN74ACT7805-20DLR-ND
IC CLOCKED FIFO 256X18 56-SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74ACT7805-20DLR
    DISTI # 595-SN74ACT780520DLR
    FIFO 256 x 18 synchronous FIFO memory
    RoHS: Compliant
    0
      SN74ACT7805-20DLRFIFO, 256X18, 13ns, Synchronous, CMOS, PDSO56
      RoHS: Compliant
      36750
      • 1000:$15.7100
      • 500:$16.5400
      • 100:$17.2200
      • 25:$17.9600
      • 1:$19.3400
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      उपलब्धता
      स्टक:
      Available
      अर्डर मा:
      2500
      मात्रा प्रविष्ट गर्नुहोस्:
      SN74ACT7805-20DLR को हालको मूल्य सन्दर्भको लागि मात्र हो, यदि तपाइँ उत्तम मूल्य प्राप्त गर्न चाहनुहुन्छ भने, कृपया हाम्रो बिक्री टोली sales@omo-ic.com मा सोधपुछ वा प्रत्यक्ष इमेल पेश गर्नुहोस्।
      सन्दर्भ मूल्य (USD)
      मात्रा
      एकाइ मूल्य
      विस्तार मूल्य
      1
      US$ ०.००
      US$ ०.००
      10
      US$ ०.००
      US$ ०.००
      100
      US$ ०.००
      US$ ०.००
      500
      US$ ०.००
      US$ ०.००
      1000
      US$ ०.००
      US$ ०.००
      बाट सुरु गर्नुहोस्
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