ProASIC®3 FPGA Family

By Microsemi SoC 174

ProASIC®3 FPGA Family

The ProASIC3 family of FPGAs from Microsemi offers performance, density, and features beyond those of the ProASICPLUS® family. Nonvolatile Flash technology gives ProASIC3 devices the advantage of being secure, low-power, single-chip solutions that are instant-on. ProASIC3 is reprogrammable and offers time-to-market benefits at an ASIC-level unit cost. These features enable designers to create high-density systems using existing ASIC or FPGA design flows and tools. ProASIC3 devices offer 1 kilobit of on-chip, reprogrammable, nonvolatile Flash ROM storage as well as clock conditioning circuitry based on an integrated phase-locked loop (PLL). The A3P015 and A3P030 devices have no PLL or RAM support. ProASIC3 devices have up to 1 million system gates, supported with up to 144 kilobits of true dual-port SRAM and up to 300 user I/Os. ProASIC3 devices support the Arm Cortex-M1 processor. The Arm-enabled devices have Microsemi ordering numbers that begin with M1A3P (Cortex-M1) and do not support AES decryption. ProASIC3 devices have a very limited power-on current surge and no high-current transition period, both of which occur on many FPGAs.

Advantages to the designer extend beyond low unit cost, performance, and ease of use. Unlike SRAM-based FPGAs, Flash-based ProASIC3 devices allow all functionality to be instant-on; no external boot PROM is required. Onboard security mechanisms prevent access to all the programming information and enable secure remote updates of the FPGA logic. Designers can perform secure remote in-system reprogramming to support future design iterations and field upgrades with confidence that valuable intellectual property (IP) cannot be compromised or copied. Secure ISP can be performed using the industry-standard AES algorithm. The ProASIC3 family device architecture mitigates the need for ASIC migration at higher user volumes. Flash-based ProASIC3 devices exhibit power characteristics like an ASIC, making them an ideal choice for power-sensitive applications. This makes the ProASIC3 family a cost-effective ASIC replacement solution, especially for applications in the consumer, networking/communications, computing, and avionics markets.

  • High capacity
    • 15 K to 1 M system gates
    • Up to 144 kb of true dual-port SRAM
    • Up to 300 user I/Os
  • Reprogrammable Flash technology
    • 130 nm, 7-layer metal (6 copper) Flash-based CMOS process
    • Instant-on Level 0 support
    • Single-chip solution
    • Retains programmed design when powered off
  • High performance
    • 350 MHz system performance
    • 3.3 V, 66 MHz 64-bit PCI
  • In-system programming (ISP) and security
    • ISP using on-chip 128-bit advanced encryption standard (AES) decryption (except Arm-enabled ProASIC3 devices) via JTAG (IEEE 1532 compliant)
    • FlashLock® to secure FPGA contents
  • Low-power
    • Core voltage for low power
    • Support for 1.5 V-only systems
    • Low-impedance Flash switches
  • Embedded memory
    • 1 kb of Flash ROM user nonvolatile memory
    • SRAMs and FIFOs with variable-aspect-ratio 4,608-bit RAM blocks (x1, x2, x4, x9, and x18 organizations)
    • True dual-port SRAM (except x18)
  • Arm processor support in ProASIC3 FPGAs
    • M1 ProASIC3 Devices/Arm Cortex-M1 soft processor available with or without debug
  • High-performance routing hierarchy
    • Segmented, hierarchical routing and clock structure